c8051f410

Product Summary

The C8051F410 is a fully integrated, low power, mixed-signal system-on-a-chip MCU.With on-chip Power-On Reset, VDD monitor, Watchdog Timer, and clock oscillator, the C8051F410 is truly standalone system-on-a-chip solution. The Flash memory can be reprogrammed even in-circuit, providing non-volatile data storage, and also allowing field upgrades of the 8051 firmware. User software has complete control of all peripherals, and may individually shut down any or all peripherals for power savings. The on-chip Silicon Laboratories 2-Wire (C2) Development Interface allows non-intrusive (uses no on-chip resources), full speed, in-circuit debugging using the production MCU installed in the final application. This debug logic supports inspection and modification of memory and registers, setting breakpoints, single stepping, run and halt commands. All analog and digital peripherals of the C8051F410 are fully functional while debugging using C2. The two C2 interface pins can be shared with user functions, allowing in-system programming and debugging without occupying package pins.

Parametrics

C8051F410 absolute maximum ratings: (1)Ambient temperature under bias: 55 — 125 °C; (2)Storage Temperature: 65 — 150 °C; (3)Voltage on VREGIN with respect to GND: 0.3 — 5.5 V; (4)Voltage on VDD with respect to GND: 0.3 — 3.0 V; (5)Voltage on VRTC-BACKUP with respect to GND: 0.3 — 5.5 V; (6)Voltage on XTAL1 with respect to GND: 0.3 — VDD+ 0.3 V; (7)Voltage on XTAL3 with respect to GND: 0.3 — 5.5 V; (8)Voltage on any Port I/O Pin (except Port 0 pins) or RST with respect to GND: -0.3 — VIO + 0.3 V; (9)Voltage on any Port 0 Pin with respect to GND: 0.3 — 5.5 V; (10)Maximum output current sunk by any Port pin: 100 mA; (11)Maximum output current sourced by any Port pin: 100 mA; (12)Maximum Total current through VDD, VIO,VRTC-BACKUP, VREGIN, and GND: 500 mA.

Features

C8051F410 features: (1)High-speed pipelined 8051-compatible microcontroller core (up to 50 MIPS); (2)In-system, full-speed, non-intrusive debug interface (on-chip); (3)True 12-bit 200 ksps ADC with analog multiplexer and 24 analog inputs; (4)Two 12-bit Current Output DACs; (5)Precision programmable 24.5 MHz internal oscillator; (6)Up to 32 kB bytes of on-chip Flash memory; (7)2304 bytes of on-chip RAM; (8)SMBus/I2C, Enhanced UART, and SPI serial interfaces implemented in hardware; (9)Four general-purpose 16-bit timers; (10)Programmable Counter/Timer Array (PCA) with six capture/compare modules and Watchdog Timer function; (11)Hardware smaRTClock (Real Time Clock) operates down to 1 V with 64 bytes of Backup RAM and a Backup Voltage Regulator; (12)Hardware CRC Engine; (13)On-chip Power-On Reset, VDD Monitor, and Temperature Sensor; (14)On-chip Voltage Comparators; (15)Up to 24 Port I/O.

Diagrams